1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to the field of data processing systems providing vector floating point arithmetic.
2. Description of the Prior Art
It is known to perform vector normalisation operations upon vector floating point vector V to generate a normalised vector that has length one and points in the same direction as the input vector V. This vector normalisation can be performed as the following sequence of calculations:                1. Given an input vector V, compute the dot-product of the input vector V with itself;        2. Compute the reciprocal square root of the dot-product; and        3. Multiply each component of the input vector V by the reciprocal square root value.        
While the above sequence of mathematical operations works well for idealised mathematical real numbers, there is a problem that floating-point numbers only represent mathematical real numbers within a limited range and with a limited degree of precision. In particular problem in the context of the above described vector normalisation technique, the dot-product may overflow or underflow resulting in at least a loss of precision in the final result and potentially an unacceptable error.
One approach to addressing this problem would be to identify the vector component of the input vector V with the largest value, and then divide the other vector components by this value whilst setting the vector component with the largest value to a magnitude of one. The problem with this approach is that it introduces additional floating-point divisions which reduces processing speed and increases power consumption. Another approach to addressing this problem would be to perform the intermediate calculations within the vector normalisation procedure with a higher degree of precision than the input vector V (e.g. if the input vector V is a single-precision floating point number, then the intermediate calculations may be performed using double-precision floating point numbers). However, while this approach is robust, it again results in lower speed, higher power consumption and assumes that support for higher precision floating point arithmetic is available.